Detector Group

The major achievements of the Detector Group in the past year were the consolidation of the Excalibur detectors¹, which now run very reliably with the ODIN-DAQ framework², the release of the Xspress4 pulse processor to the users of beamline I20³, the full characterisation of the second demonstrator of small pitch Ge detector, the conceptual design of the arc-detector for beamline I15-1, and substantial progress with the Tristan project.

Figure 1: The 1 million pixels sensor module mounted on the Tristan1M framework, ready to be powered up for operations.

The Tristan project can be considered the most innovative detector system that the Detector Group is currently developing. Tristan is based on the Timepix3 read-out ASIC which works in event driven mode (time stamp and location of an event sent out for any occurrence)⁴, rather than in frame based mode. The time stamping capabilities of Timepix3 make it, conceptually, a very good detector for time resolved experiments.

Figure 2: Reconstructed diffraction image of the events due to single crystal diffraction which are recorded by Tristan. The test was carried out at I19.

The data from the 16 chips of one module are acquired and formatted by the FEMII card, which was developed by the Science and Technology Facilities Council (STFC) under the CfI programme, and which is used in the Xspress4 pulse processor, and in the Arc-detector for beamline I15, which is under development. The FEMII card sends the data to a Linux server through a 10 Gbit/s fibre optics link. The Linux server runs the ODIN-DAQ framework as data acquisition software and sends the data to storage through an Infiniband connection. The data are stored in HDF5 format.

Another important ongoing project is the development of an arc-detector for I15-1 based on CdTe sensors and Medipix3RX. The project is at the conceptual stage. Most of the concepts have been defined and we are starting the detailed design of some parts. The detector will consist of an array of monolithic CdTe sensors with a format of 256 x 768 pixels with 55 micron pitch. Each sensor is bonded to three Medipix3RX ASICs to make up a hybrid. Twenty-four hybrids are then arranged in an arc as shown in the sketch in Fig. 3. The 24 hybrids will cover 110°. The system will then drive 72 ASICs in parallel. Two FEMII cards will be the read-out electronics that will be located in a rack a few metres apart from the detector head. The data channel between the detector head and the FEMII cards will be made out of fibre optics links generated by a number of ancillary small FPGA cards located on the arc.

Figure 3: Engineering sketch of the
I15-1 arc detector structure. The
layout of the 24 hybrids, which
cover an angle of 110°, is clearly
visible.

The Xspress4 pulse processor was also used to read-out the 19-element Ge detector demonstrator currently under evaluation by the Detector Group. The Xspress4 proved to be effective also with this detector and enabled read-out in parallel to all the 19 channels, both in laboratory tests and in tests at the Test beamline B16. The cross-talk correction characteristics of Xspress4 worked effectively also with a detector using a different technology with respect to those in use at I20 and B18. This proved that the Xspress4 can be applied to a variety of detector systems. A patent granted to the Xspress4⁵ recognises this concept as highly innovative.